1. Technical Field
Example embodiments relate to a large form factor solid state image sensor and an imaging apparatus using the same.
2. Related Art
Solid-state image sensors may be applied to medical instruments in order to enable the use of the medical instruments for discovering a disease or other condition harmful to the health of a patient in the early stages of the condition thereby reducing medical expenses. X-ray imaging systems may be used for this purpose.
Unlike a visible light image sensor, it may be difficult or, alternatively, impossible to use an optical lens system for refracting X-rays. Instead it may be desirable to use a large image size sensor or tiled image sensors including, for example, a so-called flat panel detector (FPD) which may have a size that is equal, or near equal, to that of the subject being photographed. Two types of large image size X-ray sensors have been developed. One of the types of X-ray sensors may include a photo-conductive material like amorphous selenium (a-Se) and thin film transistors (TFT) formed on a glass substrate. The other type of X-ray sensor may include an amorphous Si (a-Si) layer and thin film transistors (TFT) formed on a glass substrate. Further, a scintillator such as a cesium iodide (CsI) micro-crystalline layer may be applied on top of the a-Si layer to generate visible light emitted by incident X-ray. The X-ray image sensor using a photo-conductive material the same as or similar to a-Se is called a direct conversion type X-ray image sensor. The X-ray image sensor using a scintillator such as CsI micro-crystalline, on the other hand, is called an indirect conversion type X-ray image sensor. These conventional X-ray image sensors can be manufactured by the process technology similar to that of TFT used for a liquid crystal display (LCD). An LCD may include a liquid crystal layer and a TFT switching matrix formed on a glass substrate. An image size of the conventional X-ray image sensor may be 14 square inches, for example. However, it may be difficult for the conventional X-ray image sensors to capture a motion picture without image lag due to the large capacitive load and the TFT's slow switching speed. An angiocardiography, for example, may require a motion picture imaging to follow the actions of blood vessels around the beating heart.
A solid-state image sensor, for example a metal oxide semiconductor (MOS) sensor, has been applied to an X-ray imaging system to capture such a motion picture. The available image size of the MOS sensor, however, may be limited by the size of a silicon wafer used. A multifaceted FPD that combines plural MOS sensors, for example 4 sensors arranged in a 2×2 configuration, has been developed. Accordingly, available image sensing area of the FPD can be enlarged.
FIG. 1(a) shows a prior art of a MOS sensor. On the MOS sensor 1, a vertical scanning circuit 3, a horizontal scanning circuit 4, and a signal read-out circuit 5 are formed around a rectangular image sensing area 2. The signal read-out circuit 5 may include an analog to digital converter (ADC) and a co-related double sampling circuit (CDS) (not shown in this figure). A digital to analog converter (DAC) circuit 6, a timing pulse generation circuit 7, and a digital image processing circuit 8 are also included in the MOS sensor 1.
Input and/or output buffer circuits, input protection circuits, and an interface circuit (I/F) (not shown in this figure) may also be integrated on the periphery of the MOS sensor chip 1. These circuits and components discussed above as being included in portions of the MOS sensor chip other than the image sensing area 2 may be referred to as peripheral circuits.
The image sensing area 2 is formed by an array of unit pixels 13. The array includes m pixels horizontally by n pixels vertically to have m times n (i.e., m×n) pixels on the chip, for example, where ‘m’ and ‘n’ are both positive integers greater than 1. Each of the unit pixels 13 may include an optoelectronic conversion device including, for example, a pn-junction photo-diode and a MOS transistor circuit. A deep depletion layer, more than 50 micron meters in depth, for example, formed in the pn-junction of the unit pixels 13 may be necessary to improve the X-ray sensitivity because of the low absorption coefficient in Silicon (Si) with respect to the incident X-ray. A scintillator, for example, CsI micro-crystalline layer may be applied above the pn-junction to convert the incident X-ray to visible light, which may be effectively absorbed within 10 micron meters of depth in Si, for example. The MOS transistor circuit included in the unit pixels 13 may include a known three-transistor circuit composed of an amplifying transistor, a reset transistor, and a select transistor, for example. By controlling horizontal signal lines 10, charges stored in the photo-diode may be read out through the vertical signal line 11. The signal lines 10 may be connected to, and controlled by, the vertical scanning circuit 3. The signal lines 11 may be connected to the signal read-out circuit 5.
Another configuration of photo-diodes and the MOS transistor circuit is shown in FIG. 1(b). In the configuration illustrated by FIG. 1(b), every four pixels form a group. Each group may include a known MOS transistor circuit accompanying four photo-diodes 25-1, 25-2, 25-3, and 25-4. The MOS transistors 18-1, 18-2, 18-3 and 18-4 may be switched by the read control signals 10-1, 10-2, 10-3 and 10-4. Photo-generated charges stored in each photodiode may be transferred to the gate electrode of the MOS transistor 18-6, and reset by the MOS transistor 18-5. Consequently, the number of the MOS transistors per pixel may be 1.5 transistors, and the number of the global lines per pixel in the horizontal direction may be 1.25 lines per pixel. Two types of wiring are defined. One type of wiring is local wiring which runs inside the pixel. The other type of wiring is global wiring which runs over multiple pixels or across the image sensing area 2. Examples of global wiring include lines 10 and 11 in FIG. 1(a), and lines 10-1, 10-2, 10-3, 10-4 and 11 in FIG. 1(b).
As shown in FIG. 1(c), the signal read-out circuit 5 may include comparators 14-1 and counters 14-2 to form a series of ADCs in a column direction. Image signals transferred by the global wiring 11 may be compared with the output signal of the DAC 6. Digitized signals may be outputted by controlling the signal lines 12. As shown in FIG. 1(d), the vertical scanning circuit 3 and the horizontal scanning circuit 4 may include flip-flop circuits 15 and logic gates 16 to form shift registers in row and column directions respectively. Having control (Con.), start (Sta.) and clock (Clk.) signals, output signal pulses 10 and 12 with predetermined timings and pulse widths may be generated to control the vertical scanning circuit 3 and the horizontal scanning circuit 4, which are arranged in a row and column direction, respectively, so as to be aligned with the arrangement of pixels in horizontal and vertical directions. For example, though the scanning circuit in FIG. 1(d) is illustrated as being arranged in the row direction as an example of the vertical scanning circuit 3, the scanning circuit in FIG. 1(d) may also be arranged in the column direction as an example of the horizontal scanning circuit 4. Photo-conductive materials including, for example a-Se or a-Si, may be deposited with a scintillator on the top of the MOS sensor to generate photo-excited charges effectively when exposed to an incident beam of high energy light including, for example, an X-ray beam.
In the example illustrated in FIG. 1(a), peripheral circuits including the vertical scanning circuit 3, the horizontal scanning circuit 4 and the signal read-out circuit 5 are located next to vertical and horizontal sides of the image sensing area 2. These peripheral circuits located by the image sensing area 2 on the chip are examples of dead space. The term dead space refers to areas of the MOS image sensor 1 that are light-insensitive. As used herein, the term image sensing area refers to an array of unit pixels. Isolation areas in between light-sensitive elements of unit pixels are not light-sensitive. However, though isolation areas in between pixels of the image sensing area 2 are not light sensitive, as used herein, the term dead space refers to peripheral circuits and I/O components including an input protector outside of the image sensing area, and the term dead space does not refer to an isolation area between the pixels of the image sensing area. Examples of peripheral circuits that are dead space include the vertical scanning circuit 3, the horizontal scanning circuit 4, the signal read-out circuit 5 and other peripheral circuits including a DAC 6, a timing pulse generation circuit 7, a digital image processing circuit 8, an interface circuit, input and/or output buffer circuits, input protection circuits, and contact pads 9.
As the size of the MOS sensor is increased, the image sensing area may become dominant over the peripheral circuits because the area for the input and/or output buffer circuits, input protection circuits and contact pads are not necessarily proportional to the area for the image sensing area. Consequently, if a surface area of an image sensor is increased by a certain percentage and a number of pixels in the image sensor is increased, a surface area of an image sensing portion of the chip may become larger by an even greater percentage.
Stacked or three dimensional (3D) sensor structures have been developed to enlarge the image sensing area on a first chip, which is stacked on the second chip. The horizontal scanning circuits and vertical scanning circuit that are composed of a series of unit circuits including, for example, a shift register circuit, may be arranged in a row and column direction so as to be aligned with the arrangement of pixels in horizontal and vertical directions respectively. In the stacked type sensor, however, peripheral circuits like the horizontal and the vertical scanning circuits may be integrated on the second semiconductor chip. Further, control signal lines to, and output signal lines from, each pixel should be routed between the first and the second semiconductor chips.
As is mentioned above, the vertical and horizontal scanning circuit 3 and 4 may have a series of shift registers which correspond to each line of the horizontal and vertical global wiring 10 and 11, respectively. Straight and same pitch global lines may be routed with the pixel array and such routing may suppress fixed pattern noise due to signal delay non-uniformity. With respect to the conventional stacked structure, the first semiconductor chip should be stacked on the larger size of the second semiconductor chip in order to keep the above-mentioned same routing pitch of the global lines or shift register layout pattern. The second semiconductor chip, in such a case, may have a large blank or unused area unless the second semiconductor chip is hooked or L-shaped. However, a hooked or L-shaped semiconductor chip may be difficult for a wafer dicing machine to cut or form.
It should be also noted that the semiconductor chip may be damaged by high energy particles or radiation like X-ray beam. As for the MOS image sensor, charges trapped in silicon dioxide (SiO2) may cause a shift in threshold voltages of MOS transistors of the MOS image sensor. This shift in threshold voltages may cause image quality of the MOS image sensor to deteriorate and eventually reduce a product life time of the MOS image sensor.